#499 – Discussing Chiplets with Ming Zhang

Chris Gammell: This is The Amp Hour Podcast. Released July 5th, 2020. Episode 499. Discussing chiplets with Ming Zhang. Welcome to the Amp Hour. I'm Chris Gammell of Contextual Electronics.

Ming Zhang: Hi, my name is Ming Zhang from Zglue.

Chris Gammell: Hey Ming, how are you doing?

Ming Zhang: I'm doing great. How are you?

Chris Gammell: Oh, good, good. We talked in person about five years ago. And I remember you were telling me about this interesting idea you were working on. And then we kind of lost touch. And then recently I saw Zglue in the news and all this stuff about chiplets. And I'm like, I remember talking to someone about this. And then I looked it up and of course it was you. And wow, this is an interesting... I'm really excited to talk about this. I think this is an interesting new part of the field for putting silicon together. It's basically... Well, maybe you can explain what it is. So what is Zglue and how did you get into this side of the industry?

Ming Zhang: Yes, absolutely. I just wanted to say that indeed, right? So the bad news is that we talked five years ago, we lost Hatch. The good news is that certainly we're reconnecting for the right reason, right?

Chris Gammell: Yeah, right, right. Exactly.

Ming Zhang: Yeah, yeah. So it's very exciting. Well, I think in my view, chiplet integration or heterogeneous system integration, is the future of semiconductor industry. It is fundamentally going to be the enabler of any new innovation because Moore's law is probably coming to an end, even though not everybody's going to admit it. I think this type of design style and manufacturing style would fundamentally contribute to the innovation at the society level and certainly at the industry level.

Chris Gammell: Yeah. Could you define what a chiplet is? Because I've said it before on the show and I'm sure I've misquoted what it actually is. So what is a chiplet?

Ming Zhang: Well, chiplet, the definition can be controversial. There are multiple versions of it. A version of the chiplet definition is it's any small chip, right? Chiplet is a small chip, meaning that it's a small chip that performs a particular function, computing if it's a microcontroller, sensor, sensing if it's a sensor, and radio if it's trying to communicate things. That's one type of definition. The other type of definition is more technical, meaning that it's sort of a wafer level CSP package or a bumped die, meaning that it's any small component that's capable of being flip chip assembled on a substrate. So I don't know which one is more accurate, but these are the two types of definition that's flying around.

Chris Gammell: Yeah, those both work great, I think. And I think the specific piece, when I think of chips, usually when I think of chips, I think of like polymide encased, SOIC8 kind of thing, but it is at the silicon level that you're talking about because you're going to do some level of integration later.

Ming Zhang: That's exactly right. So, I mean, maybe from a customer perspective, right, the chiplet really service a need from the customer. The customer is innovators that want to create very differentiated and useful product, hardware product. So really fundamentally, they're trying to build a system that combines multiple ingredients, right? Computing, sensing, communicating, memory ingredients. Every one of the chiplet performs a particular thing, such as computing or sensing temperature or moving data from point A to point B. That's the reason why it's useful for hardware makers. Yeah.

Speaker ?: Yeah.

Chris Gammell: Yeah. And basically, to my eye, it's kind of a shrinking of the PCB that where the PCB allowed you to, you know, glue functions together in the past. So like you said, it might have a temperature sensor and a microcontroller and a RF thingy. You would lay out a circuit board and you'd glue them all together using the larger package sizes. But really, at the end of the day, that was taking, you know, silicon and connecting it to other silicon just through a lot of layers of polymide and bond wires and whatever else is in there. And then down to PCBs and all of the associated capacitance and inductance that's associated with it. So does the chiplet and the Zglue method of getting it all together, does that ultimately have like some performance increase as well? Or is it more just the convenience of it?

Ming Zhang: Well, before I answer that question, I just wanted to maybe calibrate our understanding a little bit. There are typically two ways to look at chiplet integration. One way is coming from the PCB angle, which is what you described. The other way is coming from the chip angle or ASIC angle, right? PCB is one particular way of integrating different components into a different system. When you compare chiplet integration technology, such as Zglue technology to PCB system, the primary advantage is going to be miniaturization.

Chris Gammell: Okay.

Ming Zhang: The other side of the coin is going to be ASIC or monolithic system on a chip. So bigger companies such as Apple or Intel, theoretically, they have the ability and money to combine all the chosen IP blocks onto a single process node or single piece of silicon on a single process node that becomes their system on a chip or application specific ICs. Now that's the other angle, right? So obviously the advantage of chiplet integration compared to monolithic system on a chip would be time to market rather than spending quarters and years waiting for a production sample. We have been able to deliver to our customers production samples in about one to three months.

Chris Gammell: Wow. That's great.

Ming Zhang: So it really depends on who you compare with. It's a little bit bipolar, PCB or single chip.

Chris Gammell: But do you get the advantage of, you know, at least with Apple ASICs, they also get to piss off all the Intel shareholders by switching over to their custom ARM chips, right? Yeah. I don't know if you get that.

Ming Zhang: I'm aware of the news. And I think it's on that particular thing, it's definitely coming, right? So any bigger companies, they wanted to produce a ecosystem that they can completely control, right? So that is what it is.

Chris Gammell: Yeah. Yeah. And I think it ties into differentiation, which I think it also is a value add for Zglue, right? It's like at the end of the day, if I have a customer, so as a consultant, if I have a customer and I want them to be able to differentiate from, you know, a product that is very similar or maybe even copied, borrowed, whatever, that could be done now at a chip level. Not saying that, you know, it couldn't be copied at a chiplet level rather. So that I think that Zglue and customized chiplet based systems could also offer differentiation and or, you know, quasi security by obscurity by, you know, encasing it in a smaller package.

Ming Zhang: That's exactly right. So what I talked about earlier was comparing to PCB, the key advantage is miniaturization compared to monolithic single chip. The key benefit is time to market. Now, the common intercept in between the two is really what you call quasi security, which is more making the subsystem a little bit harder to be reverse engineered, right? Nothing is impossible, right? Everything can be reverse engineered, right? And it's just that, is it worth the hacker's time or is it worth the copycat's time, right? When you integrate chiplets into a single package on top of a silicon opposer with programmable wires that are further encrypted by security bits in one-time programmable memory, that makes everything so much harder, right? It's not impossible, but all you have to do is to make it not worthwhile for the copycaters.

Chris Gammell: It is a hassle, let me tell you. Yeah. Maybe we can start to dive into the, to the, how, how it all goes together. So you'd mentioned program, one-time programmable. Could you kind of give us a word picture for what this looks like? So now we have chiplets and maybe we can use an example. You would give an example chip, the Omni chip as an example. So could you maybe describe what the Omni chip is? Then we can use that as the basis for kind of describing the system and then how it all goes together.

Ming Zhang: Yeah. Omni chip is a reference chip that we've published and it's actually produced by or through the chip builder and the underlying manufacturing technology. The most important thing is we want to enable a custom chip design, not only quickly, but also intuitively. Meaning that if you're a product maker today, you probably would rather start from the definition, the system rather than transistors or metal resistance. So the first question you probably should ask yourself is what exactly am I building? Well, the answer could be I'm building a system that wants to run a tiny firmware that wants to communicate through Bluetooth to my phone and measure a certain number of parameters such as temperature, acceleration, angular movement, and certainly it needs to have some type of memory to remember the states. So with that high level definition, what our technology and tooling help the system makers do is to pick the components, build the bomb, and very quickly establish the schematics and manufacturable design, deliver a single chip that accomplish that function. For example, Omni chip is an example where it has, it's a tiny little package that contains seven chiplet. And many of them are sensors. Some of them are microcontrollers and radios and memories and silicon clocks. And of course, as a system designer, you can build something else if you don't want Omni chip. The important thing is you have to know what you want, what kind of processor you want, and what kind of sensors you want. And that's why you can go through either the chipless store or chip builder to build your dream custom chip.

Chris Gammell: Yeah, yeah. And so looking at the Omni chip, what is the full size? So like the Zglue process pops out a customized package that has all of these seven chiplets inside of it. What is the final size of that Zglue-based chip? I don't know what we're going to call it. Is it like the full integrated piece is the chip and then the chiplets are inside? Is that kind of the idea?

Ming Zhang: That's right. And often there's a confusion, you know, is this a chip or a chip of chips? Sometimes we do have to explain that. Chips all the way down. Yeah, chips all the way down. Well, the final form factor in the LGA, it's about eight times six-ish millimeter. So it's very tiny. It's certainly many, many times smaller than if you were going to do a PCB. The one thing I want to mention is there are advanced packaging options that makes it even smaller, which we don't publish on the website because it does require some special handling. But LGA or QFN are the most popular or simplest package form factors that can be made available.

Chris Gammell: Okay. And LGA is like a BGA, but with like the square flat patterns, right? Without pre-balled or anything like that?

Ming Zhang: Without the balls. Yeah. That usually makes it a little bit more attractive for low Z height applications because you don't have to sacrifice the Z, the delta Z contributed by the balls. It's kind of sort of the same thing to BGAs in a way.

Chris Gammell: Yeah. Yeah. And it ends up floating on top of the solder paste or solder that gets put on each pad. I use those for a lot of the, I use like cellular modules and a lot of those, like the pre-cert modules that have, obviously they're not very low Z height because they have metal cans and everything on top of them, but they are usually LGA style that end up getting soldered down. And aside from desoldering, they're, you know, it's pretty easy to use them. And they're, I tell you what, they're definitely not eight by six. That is, uh, that's, that's pretty small. I mean, like that's smaller than a good chunk of, uh, you know, like you get a cortex M4 processor that's in a, you know, you can get a seven by seven or eight by eight by eight QFN these days that are pretty, pretty sizable. And now you're getting all that stuff in there. So what, what are some of the, the chiplets that are actually inside of the Omni chip?

Ming Zhang: Well, they're, uh, one of the biggest chiplet is a Nordic microcontroller that has the function of compute and communication through Bluetooth. Then we have a Bosch sensors. We have M cube sensors. We have a chronic flash memory and a few other peripheral chips for various power delivery and sensing functions.

Chris Gammell: Hmm. Yeah. Yeah. I see the, uh, yeah. BQ 25, 120 as well. So like that's, so basically from this thing, it seems like this could be a chiplet like the Omni chip could go into something like a, uh, one of those, uh, pulse oximeter finger thingies. And you could have like a kind of all inclusive, like a heart rate monitor that like lives on your finger with a tiny little battery in it with almost, almost a single chip solution. I'm sure that there's some, some amount of, of, uh, you know, support circuitry capacitor, similar things in there, but, but it's pretty standalone. It seems like.

Ming Zhang: That's absolutely right. That is a potential application. And you're also absolutely right about, you know, you can never really make a single chip that encapsulates everything. There are certain things that, that are just simply not friendly for silicon integration, things like big inductors and capacitors and that type of deal, or certain discreetes that are not really compatible for wafer level or silicon level assembly. So that has to go either on the package substrate or off of the package substrate on the board.

Chris Gammell: Yeah. And some things you want to customize anyways, right? So like the battery charger, you might want to have it so you could adjust the battery voltage or the battery, uh, charge rate or something for different batteries. You wouldn't, you wouldn't want to put that hard coded quote unquote into the chip design anyways.

Ming Zhang: Exactly. Exactly. Yeah. So the thing is you want to have, you kind of want to have a core chip that includes 80% of what, what you want most of the time, maybe the 20%, 15% that's left over. You do want to enable people to innovate by optimizing the peripherals on the application board, for example. Right. So that's definitely the key.

Chris Gammell: Yeah. You know, that's an interesting point about innovation too, because usually when I'm presented with tools like this, my first response is defensiveness. And I'm like, Oh my gosh, I'm the designer. I need to, I need to do all this stuff. I'm, I provide all the value to the customer block. I'm, I'm full of it though. Right. I mean, like, honestly, I'm just gluing chips together and I'm, you know, with no pun intended, I'm, I'm basically, you know, playing with Lego blocks and then putting them onto a PCB, which is basically the, you know, the same thing. And now I have, uh, I have a disadvantage to a system like this where, uh, you know, the, the size is much bigger and I have to deal with that. And, and even if I want to go smaller, sometimes I have to pay a whole lot to really pay for high density interconnect boards. Anyways, I have all the parasitic effects, like I mentioned at the beginning. So how does this start to play in the cost versus complexity versus, um, you know, all, all of the trade-offs that an engineer might make on a daily basis anyways?

Ming Zhang: Yeah. Yeah. Well, cost and complexity, right. Those are the two C words, right. Um, I think in many ways, the, in many ways, uh, cost is a more linear, uh, problem, right. Um, so the cost comparison is slightly counterintuitive because the normal, the normal perception is on a per millimeter or per centimeter square basis. Silicon doesn't matter what note is, it's gotta be many, many times more expensive than a regular board, right? That's absolutely true. Right now. However, in many cases, a Zglue chip system ends up being even more cost effective than a board fundamentally because the silicon is not dark silicon as in that it's not just a piece of silicon trying to do the job, job of a board. It actually contains active circuits, which normally you would have to buy either in, in form of a chip or in a form of discreet. So in many cases that, um, absorption of the bomb elements sort of, uh, overcomes the perceived unit, unit area, silicon cost. Now the caveat is your system better be complicated enough to justify this break even. Right. Right. Right. Let's say if you have a little mini system, all you have is a single microcontroller that's from a very large company that requires 10 discreet to make it work. You know, we're not going to get much of a benefit with Zglue system because there's nothing to integrate. Right. But if you have a system that say, let's say have a four or five chiplets and 10, 20, maybe 30, 40 discreet. Yeah. That's a pretty promising system where we'll be able to get, um, some cost benefit potentially. Now, complexity in terms of complexity, I guess, uh, it depends on, are you envisioning the design complexity or post design pre-production complexity or what are you thinking about?

Chris Gammell: I guess I was just thinking about the, um, I don't know what I was thinking about, I guess. I mean, like this is a complex system, I suppose. Um, uh, the trade-off that I was, I was kind of talking about, I think was that there are a lot of chips here and now there's an additional step to go through the Zglue system and, and, and to integrate outside of a PCB, um, uh, workflow that I'm used to. I guess that's really the complexity I was talking about.

Ming Zhang: Ah, I see. I see. I see. I see. Well, I guess, uh, I would say there's a difference between complexity and something new, right? Right. So the, the Zglue, the Zglue technology and tool is definitely something new, meaning that it's different from traditional design flow, right? That whatever you're familiar with, whether it's a cadence EDA tool flow, or maybe a free open source tool for like magic, it's new. So there's a learning overhead. And especially you're starting on the square one in terms of complexity. That's actually one of our major value add is to reduce the complexity of design capture, design optimization and post manufacturing debug. See, this tool we have that's called chip builder is you can think of it as a, all the primary functional steps for a design flow is captured in one tool, meaning below material and elements selection, design capture, schematics, in Silicon routing, four plan, right? DRC, ERC, uh, pre-production optimization, post manufacturing, debug and bring up. All of that stuff is really captured in one cloud tool. So rather than buying, you know, five tools or 50 tools, whatever the complexity is, this is really just one tool you have to work with all the way from a list of components to fully finished bucket of chips at your doorstep.

Chris Gammell: Bucket of chips. I like that. I like that.

Chris Gammell: So you were comparing it though, to a traditional. So if I was going to go to an ASIC flow, you're, you're saying, right? So if I was going to go to an ASIC or, or even just any kind of chip level flow, because like you mentioned magic and cadence, I wasn't sure if you were talking about PCB versus chip flow. I guess, I guess the complexity then when I was saying is I'm used to, I can't do those things, Ming. Uh, that's what I'm saying. And, uh, so this is, this is a new, a new method. Uh, not, it sounds like the chip builder is a rather user-friendly method. Um, but it's just, it is new, I guess. So that's really the complexity. Yeah.

Ming Zhang: Yeah. Yeah. Yeah. No, that's, that's, you know, that's absolutely very much for the right, right. Right. Right. To clarification, right. That there are two different audience groups, right? One audience group is the chip designer that likes to use EDA tools for building. Let's say ASIC. The other audience group is a system designer, board designers. We service both groups, right? We don't really have a preference of one over another. And that's what I'm saying is really, it's not so much of a complexity. It's, it's, uh, it's just something new that a lot of people actually, um, are some of our partners when they first work with us, they almost don't believe us. It's like, what are you talking about? There's really this one tool. You mean, I actually don't really have to, to build a license script on a server and connect them all together. And if you, no, that's the most painful thing in any chip design is getting, getting

Chris Gammell: the cadence license to work, talking to the sales guy. Exactly. The pain felt throughout the ages. Yes. Yeah. Yeah. And, and it's, it sounds like the integration is almost necessary because this is this level of integration that you're talking about is just like, it is pulling together a lot of things where the vendors you talk about in there, you mentioned Nordic. So that for the Omni chip, again, then you mentioned Nordic, Bosch, Maxim, TI, TI, M cube and SI time. And like, so like even pulling all those in wouldn't even really be an option for a lot of silicon designers. You know, you'd have to start talking about the licensing and all the other stuff. So that's another piece where there's a value in that Zglue's already talked to all these chip vendors said, Hey, can we get access to the raw silicon or the flip chip design and, and be able to then put it into this other system.

Ming Zhang: That, that, that's right. That's right. Yeah. So that's, that's a, that speaks to the complexity reduction, right? On the front end it's design on the backend is post production support or supply chain management or sourcing. So that the total, total complexity is actually significantly reduced from a normal workflow.

Chris Gammell: Yeah. That's great. That's great. I wanted to ask about, okay, so we've referred to it a couple of times here, but the substrate, the thing that the chiplets are going down into, this seems like another bit of mad, you know, you mentioned the web tool. That seems like a bit of magic. You mentioned the sourcing that feels like a bit of magic, but the, the substrate feels like that is really enabling things because to my eye or to my ear, I guess, in this case, it sounds like it's a low grade FPGA of sorts without much processing capability, more just the signal routing capability. Is that a, is that a fair assumption about, about the, the, the substrate?

Ming Zhang: It's close, right? Right. That the substrate, which we call smart fabric, just so that it's a little bit more differentiated from organic substrate, such as those in a package design or an abort design.

Chris Gammell: Oh, right. Yeah.

Ming Zhang: It fundamentally enables the programmable interconnect in silicon among the chiplets sitting on top of the smart fabric. And there's a little bit of a processing power to manage the system performance, right? Meaning when the system boots, there, there has to be a processing element in the smart fabric that knows which pin to connect to what. That also has a certain level of built-in self-test and security monitoring functions. Not a whole lot, but barely enough to do the job, right? The thing is you don't want to put too much processing in a silicon interposer to the point where you're producing an MCU. That defeats the whole purpose, right? Right. Just barely enough.

Chris Gammell: Well, then you have overhead and cost and complexity, you know, like all that other stuff that comes along with it. Exactly.

Ming Zhang: Yeah. You get barely enough to do the job. And, and then what's like other than the interconnect and system management function, then what we also include in the silicon interposer or smart fabric is common denominator IPs, right? For example, the Omni chip is based on a particular SKU targeting IoT wearable-ish product, which means that for this type of product, usually doesn't matter what you're building, you're going to require some sort of low power multi-rail power delivery. Uh-huh. You're going to want LED drivers, GPL expanders, push button controllers. So those IP blocks are already included in the interposer. So the system designers don't really have to worry about these jelly beans, right? All you have to do is to focus on choosing the most important things for you, meaning your choice of MCU, your choice of mems sensor, your choice of radio, that kind of thing.

Chris Gammell: Yeah. Yeah. Yeah. So it's like you're, uh, so it's, you're going to the car lot and, and the, the car salesman saying, you know what, I'm going to throw in those, uh, the, uh, the, the rugs for free or whatever they say, uh, you know, the small things, the detail package, of course, you're going to get that, you know, that's great. That's, that's, that's really nice.

Ming Zhang: Focus on using that example, although it's probably not my favorite analogy, but I would say using that example that focus on what's most important for you, meaning four-wheel drive versus front-wheel drive, right?

Chris Gammell: Yeah. Right.

Ming Zhang: And, uh, red versus black and, or with sunroof versus no sunroof, the more important things for you rather than the, the, the nitty gritty details of how the engine runs or how the, you know, how the buttons work, that kind of thing. Right.

Chris Gammell: Well, if you were going to do a, you know, completely, you know, if someone comes in, they say, oh, I need something completely custom. I need to be able to tweak every single variable. Then I'm sure, I'm sure that you say, well, then here, here's the number for the cadence salesperson. You should probably go make an ASIC, right? It's not like it's, it's meant to be a constrained system by design.

Ming Zhang: It's meant to be a constrained system by design, but to a certain point, it really depends on what people want when they want to optimize. We actually do support customization. We support custom smart fabric, meaning that let's say if a customer says that I really don't want the button controller because I don't need a button, but instead, rather than having three LED drivers, I want seven, or instead I want a crypto engine in it. Well, see, all those things can be done. We would support them by quote unquote, custom, the interposer custom design interposer. Now, of course the caveat for that is it's going to take longer time and it's going to also cost a little bit more, but it's still much faster than if you were going to do a monolithic SOC from ground up. Yeah.

Chris Gammell: Yeah. You're starting from a template then your, your, your designers are starting from a template at least. And then, and then they can, yeah. And then you're still gluing chiplets down. You're not, you're not, uh, you're not doing every IP block individually and maybe doing some of those from scratch too.

Ming Zhang: That's right.

Chris Gammell: It was interesting. We had, uh, so Adrian, uh, who's a designer at JPL, he was on here and people who listen to that show, he was, I was just sitting there dumbfounded because he does so many chip designs per year. And like just the amount of stuff he had to redo. And I feel like that is like an interesting offset to what you're talking about, because he always talked about having to redo based on like some crazy spec that NASA needed. And so then all the other IP kind of had to follow along there. And it feels like now this is like, no, no, no. The IP is ready. It's ready to go. And it, you can just kind of take advantage of it. And, and you're just kind of using what's already out there because if you implement your own ARM core in raw silicon anyways, like why, why would you do that? You can just grab the NRF 32, 52, 832 or whatever.

Ming Zhang: Yeah. It's a, it's a huge convenience in terms of reliability. Right. And even if it's quote unquote proven IP, whether it's hard IP or soft IP, there's still substantial risk in running a new breed of silicon. Right. Then, uh, maybe I'm not even talking about the time. It's just process risk and, and, uh, design manufacturing risk. It's good. You rather utilize a library of books, right? Where each book is the best in class chiplet from your favorite companies, whether it's Intel Xilinx or Nordic or dialogue or TI, right. And you get to choose, right. Cause even if one day, let's say you want to deprecate one of the MCUs because whatever reason you just simply swap out that chiplet rather than redoing the whole system. Yep. Right. So that's, that's really the beauty of it.

Chris Gammell: Um, uh, so, okay. So now say we're going to swap out. All right. We're, we're going from, so the Omni chip has NRF 52832 and we're saying, you know what, we need to move to the 52840, right? Which is the chip I'm using right now. Mm-hmm . And what does the actual connection then? So like, how does it actually change what's being put down onto this, onto the substrate and like what's actually the physical connections are? So when I put a chiplet down or when Zglue puts the chiplet down, what does that interface look like? And then how does it change between, between chips? Is it, is it like a cross hatch interface or, or what, what's actually happening in at the physical interface between a chiplet and the smart fabric?

Ming Zhang: Right. Right. Have you played with Lego board or have you, uh, someone, you know, played with Lego board? Yes.

Chris Gammell: Yes. I have many times. Yeah. Yeah.

Ming Zhang: Yeah. So there's a bigger Lego board and then there's, there's a smaller pieces of Lego blocks, right? You can pretty much within a certain constraint place the smaller Lego blocks anywhere on the bigger Lego board. Right.

Chris Gammell: Mm-hmm .

Ming Zhang: You know what I'm saying? Right. Sure. Yeah. Yeah. Yeah.

Chris Gammell: No, that's a nice analogy. It's like a one millimeter, uh, or two, a couple of millimeter, you know, block array or whatever it's called. Exactly.

Ming Zhang: And the, the, the, the Lego board, uh, the mechanism, the connector mechanism on the Lego board, uh, is constructed such that the spatial frequency is higher than the minimum pitch on the Lego block. Right. I'm using engineering terminology on a toy, but you know what I mean, right? So yeah, it's good. Yeah. It's a, so that's. Resolution problem.

Ming Zhang: Yeah. Uh, on a, on a high level, it's actually very similar to how a, uh, smart fabric works. And if you go from a earlier version of Nordic to 840, so basically the chip builder would allow you to place that new chiplet on the smart fabric, and it's going to recommend a optimal placement and routing. You don't need a new smart fabric because that the way that smart fabric is architected, it's actually agnostic to the pin, the pitch and diameter of the pins. So it's capable of reconnecting the IOs and powers and grounds to the internal logics so that the rest of the system still works. Now, I guess a little bit nitty gritty. It's really boils down to making sure the solder balls on the CSE package is connected to the pads or copper pillar in the smart fabric and making sure which chip builder software knows which is which. And that's part of the intelligence in the router and the built in self test mechanisms. I get it.

Chris Gammell: Okay. Yeah. That's, that's really interesting. So, so then what about, uh, what about some of the specialized functionality that might be required? So I have a GPIO that talks to one of the pillars in the smart fabric. That's fine. I assume it goes down into like the substrate of the smart fabric, and then it gets passed along some, you know, FPGA style matrix of gates and stuff like that. But what about when I have like an RF signal or, you know, a higher voltage needed for like a flash chip or something like that? Like how does it handle analog and RF and power in general?

Ming Zhang: That's the reason why we have multiple lanes or highways. I guess we, we would have, um, first type of lane is digital, digital routes, buffered routes. Second type is unbuffered bidirectional analog routes. And third type is for RF signals, for example, or, or highly sensitive noise, sensitive signal routes. That is essentially the top most metal on the interposer. That's hardened metal. So in a strict sense, if you're extremely sensitive about analog noise, you don't want it to go through a switching fabric. You want it to go through a very robust metal, which, uh, in this case would be RDL in the, on the very top of the interposer chip.

Chris Gammell: Got it. Okay. And so that, that does or does not have switching associated with it.

Ming Zhang: It does not. If you choose to let the signal travel on a very noise, insensitive route, it has to be a hardened route. It has to be a hardened route, which is pure metal. Now, one thing to be clear is that we position it such that it's the top metal. So it's not like you're going to go in and change metal one, metal sevens. This is really the top most metal, which is actually very easy and relatively cheap to reroute compared to if we're actually going to reprogram a metal route in the middle of the transistor stack. That'll be very hard.

Chris Gammell: Uh huh. Got it. Yeah. Just cause it's towards the end of the processing stage and.

Ming Zhang: It's toward the back end of the processing. And also, um, by definition, the top level metals tends to be, uh, wider and, uh, not meant for. You know, precise sub micron precision route. Right. It's really meant for connecting system level pins rather than transistor level ports. Right. So it's really meant for that kind of thing.

Chris Gammell: So I go to chip builder today and I decided to buy it. I put together a system. I build a chip. I have the smart fabric that's talking to it. And I maybe have a part number that's internal to Z glue. And does that mean that my part number and my, this, the silicon that pops out or sorry, the final, the final packaged up chip that pops out has what is still effectively a custom smart fabric chip just to my system. Is that, is that, is that a fair statement?

Ming Zhang: Yeah. Yeah. The, so the fabric itself is a common denominator. However, it carries the custom schematics, right? The, the schematics that you have that describe your system is effectively burned into the schematics, into the interposer chip. So in that regard, the essentially the switches have been switched in such a way that constructs the right connectivity among the chiplets in your system. So in that sense, it's custom, right? Okay. However, the underlying transistors in the silicon interposer are common, right? Right. That, that's actually the whole point, right? Because you don't want to, otherwise we would be making custom silicon for every single customer. Right. Really expensive and really expensive for everyone. Right. Yeah. Yeah.

Chris Gammell: I guess the piece I didn't understand then, maybe I heard it wrong. I thought you were saying that some of the metalization layers change for RF connections. And so if person A, which is Chris is doing a NRF 52 design and I have, you know, the antenna in, you know, the upper left corner and Ming person B is doing the exact same design, but has the antenna coming out the lower right corner. Does that mean that those are effectively different chips because of the metalization layers? Chris Bounds

Ming Zhang: If the two designers choose to route the two signals differently, then they're effectively two different chips, right? The pinout can be made different, but you don't have to, right? Like I said, the, the, the router would recommend a particular route that is considered optimal, but we also give the designer a certain amount of freedom to choose whatever they want. Okay.

Chris Gammell: Okay. Okay. And at what point would that cross over then into like, so if I go outside the recommended routes, then I assume that there's some kind of like predefined, Hey, it works really great if the Bluetooth antenna is going out from the lower right, like Ming chose. And now I'm, I'm looking at, I'm like, no, no, no, I need to go out upper left. And I'm saying it has to do that. Does that mean that's a custom, a custom element then? And then it goes into like a custom workflow. I guess I'm just trying to figure out like, when, when does this get customized versus is this like a off the shelf? Cause I assume that all that plays into the cost and the deliverability and things.

Ming Zhang: That's right. That's right. That I, I get it. Yeah. So the customization, approximately we can categorize it into two buckets. Bucket one is something you can customize by using chip builder. So the scenario that you just described belongs to that bucket. You can choose wherever that signal is coming out top left versus lower right. Cause it might have some connection to how your industrial design works. Right. That's really customization that you can control. That does not add any cost per se. Okay.

Chris Gammell: Okay.

Ming Zhang: Now the customization that would require deeper support from Zglue would be, let's say you want a crypto engine in the Omnichip smart fabric, which we currently don't offer as a standard IP. Well, that kind of thing is probably not something you want to do on your own, right? That kind of thing. We would have to support you to, to re-optimize the fabric. So that includes a crypto engine and we do a new tape out, right? That, that is not something that you want to cut, customize on your entirely on your own using chip builder.

Chris Gammell: Okay.

Ming Zhang: Does that, does that help?

Chris Gammell: That's great. Yeah, exactly. And, and that's what I would expect. I was just wondering, because you had mentioned the metalization that that, where are the lines kind of crossed of customized versus not customized? But I think, I think I'm starting to get it.

Ming Zhang: Oh, I think I'm starting to get it. Metalization is a customer. It'll be under your control.

Chris Gammell: Okay. Okay.

Ming Zhang: Metalization in terms of pinout, that'll be under your control. Got it. The customer's control. Okay. Yeah.

Chris Gammell: Okay. So then, so then, yeah, to go back to the, to the, the smart fabric thing. So, so if you and I were doing slightly different designs to the point where I'm in the upper left of the antenna, you're the lower right with the antenna, then the substrate is coming off the line is actually different because the metalization is different. Is that?

Ming Zhang: Because of the metalization is different. Yeah.

Chris Gammell: But the base silicon is the same.

Ming Zhang: And also potentially base silicon is the same. You could also argue that your, if your schematics are different, your subsystems are different. The switching fabric would behave differently, which is fundamentally a function of the firmware that's stored in OTP, right? That, that part is also different. Yeah.

Chris Gammell: It sounds like the expensive parts, which are like mask sets for silicon, that is, you're preserving that. And that would make a lot of sense to me. And, uh, that's right. And then, and then all the, the less costly things like metalization layers are customizable more. But for my benefit, I don't have to actually see what it is. I just have to say, no, no, no. I want it to be like this or this. And I want the pins to come out here. So that's, that's right.

Ming Zhang: That's right. Yeah. That's right. That's exactly right. Yeah. Yeah.

Chris Gammell: Again, to go back to design workflow, I already kind of struggle with my design workflow. Like, whoa, where do I put the chips? You know, like, oh geez, starting out. It's like, yeah, maybe it'll work like this. Do you have like a, I guess, I guess my default would just be like, well, whatever Zglue says, I'll just kind of work around that. But it's like so open-ended at the beginning of a design process that it's like, I don't know where to put things, you know, like sometimes that happens, but do you have like recommendations on, on where to actually start with a, with a, a greenfield project from Zglue? Yeah.

Ming Zhang: Yeah. Yeah. I guess there are two ways to look at it. One way is to look at the templates, right? We have templates, we call quick start templates that can be used as a starting point rather than starting fresh, right? If you want to build a edge note device that leverage FPGAs or MCUs or a combination of both, rather than completely starting from fresh, not knowing which component to choose and where to put them on the smart fabric, you can look at our template. In fact, just recently, about two weeks ago, we released a open chiplet templates that in collaboration with Google that actually contains two designs that Google has given us permission to open up. So that, that's a, that's a good starting point, right? And not only you have the design of the zip Zglue chip, but also you have the, you have access to the open source board designs and very soon we'll also be able to release some reference software around it. So that's a, that's one way to start to look at the template. The other way to start is that it's a little bit more physics driven is in the chip builder. It does make some recommendations based on design rules, right? For example, that certain chiplets are going to be recommended to be placed closer to the edge because of the, uh, signaling requirement for some other ones, the requirement is loose because it doesn't matter where they sit, right? There's not a whole lot of heat. Those kinds of design rule driven or design guideline driven recommendation will be made by the chip builder during the, during the phase of component selection and floor planning.

Chris Gammell: That's great. That's great. And actually that might be a good transition into talking about the chip builder and the chip store, chiplet store. So when people open up the chip builder, uh, they, they, it's possible to see templates and things like that, but also there are a whole lot of chiplets that are available. So how is that all determined? I mean, is that just based on licensing agreements or I guess what, what is the stage to like go shopping for a chip or chiplets in Zglue?

Ming Zhang: Well, I guess, uh, the, the templates and chiplets are two different ways of starting the design journey, right? Uh, templates is top down, right? If, if you approximately know what the final system look like, probably want to start with a template, right? The template perform a certain function and you can start with a, say a 40% completed design rather than completely new design. The chiplets, which is really bottom up, right? Uh, that that's probably more meant for, I guess, circuit designers or system designers that want to do everything on their own, right? You've picked your favorite MCU and then your favorite set of clock and sensors and memory. Then you see how to fit them together into a single package. So that these are two different ways to get started. We don't really have a specific recommendation on how to start. What we have noticed is that, uh, for bigger companies, they probably tend to start from the component view, right? Cause they, they want to have a lot of control on what components and choose for maybe smaller entities, individuals. Like I said, it's, it's easier to start with a template. So you don't have to kind of reinvent all the wheels, right? You just want to take a template and modify a small portion of it to fit your need. And there's really, I think you also asked about licensing agreement. And there's really nothing specific about licensing agreement per se, because chiplets are being listed as a component. So it's not like we're disclosing the hard IP, right? There, there is, in many cases, usually there's really no IP licensing agreement because you're not licensing the IP, you're just instantiating a model of the chiplet that are currently being sold as a chip on digikey.com, right? For example, that, that actually is part of the benefit, right?

Chris Gammell: Yeah. So is it, is it possible? I guess I, I'm, I'm never looking for something that's, you know, just a chip package or just a silicon package. Is it possible to go out and just buy these on a ti.com anyways? I mean, is this something that people are going to buy and putting down with bond wires or similar?

Ming Zhang: Oh, you mean the chiplet in the library?

Chris Gammell: That's right. Yeah. I mean, is it, is it just an off the shelf thing that I just haven't seen before? Is that likely the case?

Ming Zhang: Yeah. Most of the chiplets in our chiplet store or IE the library of chiplets are off the shelf, right? It's commercially available and you can buy from either the semi companies or the distributors. Now there are very rare cases where, uh, certain companies have their proprietary chiplet, right? Which I'd say it only works for them, right? Or it's being built for a very limited number of customers. That kind of thing is not published on chiplet store. It's preserved in a confidential portal called chiplet console. But those type of chiplets are relatively few compared to the publicly available chiplets.

Chris Gammell: That makes sense. That makes sense. Okay. All right. So people listening, if they go and sign up for the chip builder, they might want to go and get, start from a template. And then what are the, what are some of the industries that you, so you mentioned IoT, that's like one of the kind of target starting templates. What are some of the other ones that are in there that people might start from?

Ming Zhang: I think we were, we're seeing a lot of tractions are edge node AI, smaller devices that wants to operate on a low power that detects gestures and voice. So, like I said, we can, you can potentially look at the templates on our open chiplet initiative websites, where there are two Google funded designs. That's one, that's one, one vector. The other vector is medical device, industrial applications, and sometimes a certain form is wearables. All these devices tend to require a very tiny form factor, sometimes running on battery, and certainly being able to protect the IP against reverse engineering is often a benefit.

Chris Gammell: Right. Yeah. And then is it, so if there is a Micron board, I mean, do you have to kind of design your own, I guess you're just kind of pushing the debug, SWD or JTAG pins just as another IO? Is that kind of the idea as well? It's just another thing you have to route out to talk to it? That's right. Yeah. Hmm. Okay. Ah, okay. I just found all the, oh, I see. Okay. I just found the template section. Sorry. I, I shouldn't be browsing this live, but I am looking at it now and I see, I see e-cigarette as well. That's interesting. That's a, not a, not one that I would have guessed, but I guess that makes sense. That's right. Yeah. Small.

Ming Zhang: It's small. And it also the, in terms of managing ability to manage low standby power, but high active mode current. It's actually a quite challenging use case.

Chris Gammell: Yeah. Right. And, and a new word that I've never heard before, smart grazierry, which apparently is internet of cows. Internet of cows. Yeah. Yeah. I like, I like the term to be honest. Smart grazierry is, it's very specific. It's where, where is my stuff eating my other stuff?

Ming Zhang: That's right. That's right. And they better be doing, taking that actually in a very smart way. Yes. Yeah. Yeah.

Chris Gammell: Yeah. So let's talk cost. I mean, we've kind of skirted the issue a little bit, but is there a general rule for, okay. So let's, I guess we can use the smart grazierry example here, right? There's an NRF 52840. Looks like an MC 3672. TMP 108. So it looks like some, some temperature monitoring, some Bluetooth. And then a U blocks, a GNSS type of thing for telling where, where in the world, those cows happen to be. So like, if those chips cost 1k, you know, some summation of all the chip costs was at 1k pricing was like $8 or $10. Is there a premium on that, that I'm going to have to pay because of processing and everything else? Or do I get a discount because now ST or sorry, that Nordic and microchip and all those other folks don't have to put them in polymide? Like what is, are there any rules of thumb that people can use for, for putting these things down onto chip as chiplets?

Ming Zhang: Well, I guess just to clarify the cost components of it, right. There is the single unit per unit cost. There's also the development cost, right? The easier part of the story is the development cost, right? We have a mechanism called shuttle program, where we would ship customers a bucket of 10 chips at $25,000, right? That includes the development cost and also a bucket of 10 chips. So that's really a lump sum, right? So that's really a lump sum, simple pricing that actually includes the chiplet. Now at volume, the unit cost, typically we ask people to choose between consignment model or no consignment, right? At consignment, right? Meaning that if the customer wants to buy their own chiplets, meaning Texas instrument chips, Nordic chips, Bosch chips, then a good rule of thumb at volume for the unit price, or the other part of the Zglue price is really single digit dollars, right? Now, you know, I notice I'm being very careful of saying single digit dollars, right? It's, you know, it's between one and nine, right?

Chris Gammell: It's an analog value, yes. Okay.

Ming Zhang: But the important thing is it's not like 10 cents. It's also not $50, right? That is what it is, right? Semiconductor industry, the way it works is that from 1K unit to 100K unit to 10 million units, right? The pricing tier is that you do see that much variation on a per unit basis.

Chris Gammell: Yeah.

Ming Zhang: But the important thing is that we would highly recommend anybody who is interested in doing this to start off something small, which is get a bucket of functional prototypes, which is equivalent to what's traditional called EVT or DVT at $25,000 a bucket that typically takes one to three months. And then beyond that point, work with us to build a volume production plan. Yeah. Most likely through consignment. Yeah.

Chris Gammell: I assume that people are, that are using the service there, they already know that they are space constrained and they are, you know, power constrained or all of the other constraints that are driving a custom solution like this, you know, quasi custom, I guess we could call it. I mean, it, it, it, it's not something that someone's just going to, I don't think this is going to hit the hobbyist market anytime soon. I'll tell you, I'll tell you that much. Unless you got 25 grand, you know, burning a hole in your pocket. Yeah. It just doesn't, it seems like it has to be a specified use case, but when you have it, then it seems like it could be very, very valuable.

Ming Zhang: That's right. That's right. Yeah. I think for hobbyists, they're probably better off to use existing reference designs, for example, Omnichip or Gem1. Gem1 is our collaboration with Google, for example, right? And rather than doing a brand new design, completely fully customized, it probably makes more sense to customize the jelly bean functions around the chip on the board and, or the firmware on top of it. That gives you a little bit of customization, but not full blown custom silicon. Right.

Chris Gammell: Got it. Yeah. And so is it possible to just, so could I just go buy an Omnichip for a fixed price or I still have to go through the Zglue process?

Ming Zhang: You could buy, buy that at a fixed price. It's, it's actually distributed on our website.

Chris Gammell: Oh, great. Okay. All right.

Ming Zhang: Either the chip, Omnichip and, or the dev kit that comes with it.

Chris Gammell: Yeah. And, and some people might look at that and say like, oh, that's exactly what I want. And I want it to be that small. And it, like you said, it's got a ton of sensors in it. It's got, you know, power handling and everything else. So yeah, you could just go start with that today. And that's pretty cool. Yep. Yep. So from a cost perspective, it seems like there is a cost, but like, like you said, with, you know, like a shuttle program, like you mentioned 25,000 for 10 chips. I mean, if, if you're going to do a Moses run, I think even that would be in the tens of thousands, maybe not tens of thousands, but I think, you know, you're sharing chips and you don't get all the packaging and everything else. So it, it's really in line with other custom solutions, at least from, from my standpoint.

Ming Zhang: Yeah. It's, it's in line or in many ways it's, it's better, it's faster and cheaper, right? Again, this is not a Moses type of run. This is actually a very advanced packaging technique that enables almost a single chip form factor, but almost at the turnaround time of PCB. Right. That is, uh, yeah, that is really the benefit. Right. And the more important thing is that this is not just a prototype, even though it might sound like a prototype. As soon as you're ready with volume production, the underlying technology and the partners we work with, such as TSMC and AIC are fully capable of scaling up to tens of millions of a year. So it's full volume production ready when you're ready. Right.

Chris Gammell: So, yeah, I was going to ask you about manufacturing partners. So TSMC is, is doing like the, are they doing the smart fabric or are they actually doing the packaging as well?

Ming Zhang: They're doing the smart fabric. Uh, we work with AIC on the sort of the final assembly part of the work.

Chris Gammell: Yeah. Okay. I had not heard of them, but I don't, you know, I'm not, I'm not in that world anyway. So, uh, so like when a, when a chiplet shows up, I mean, is it like it shows up in a tray or what does this, I guess I don't even know what they're shipping. They don't ship in tape. Do they like, what is, what is the, what is the shipping mechanism for a device like that?

Ming Zhang: For our chip or the incoming chiplets?

Chris Gammell: Yeah. For the incoming chiplets. Yeah. I assume that yours comes in like a tape so it could be placed by a pick and place machine. But like, what does that assembly process look like at the chiplet level?

Ming Zhang: Oh, at chiplet level, at that level, due to the quantity, usually tape and reel type of mechanism that's more compatible for automation.

Chris Gammell: And that's just a standard of being able to put chiplets together, I guess, huh?

Ming Zhang: It's probably a pseudo standard. There are other ways to do it, but I think tape and reel is still pretty popular and prominent.

Chris Gammell: Okay. Yeah. I guess I just, I think of them as being so delicate that I would be afraid to touch them. So, but yeah, it makes sense. If robots are doing it, then yeah, they got to come in some kind of standardized form factor. So that makes sense.

Ming Zhang: Before or until, unless Sky Knight takes over, right?

Chris Gammell: Well, of course, of course. Always, always the problem, but yeah. So what else should people know about, about ZGLOO? I mean, other chips that are on the chiplet store, what else should people think about when they're considering getting started? And like, who, who do you see this as a best fit for?

Ming Zhang: I think what I see the best fit for is really the hardware innovators that are trying to make impossible products, right? Things that are impossibly small or impossibly longer battery life in an impossible timeline, right? That, that is really where I think that there's a lot of opportunity, right? Like I said, the, oftentimes there's a misperception that only the bigger companies can afford a custom chip solution, such as Apple, right? You rightfully quote it. Right. That doesn't have to be the case, right? And we, we actually had a, had a headline in a CES about a year ago, that's slightly controversial and got us a lot of attention on LinkedIn, but it was actually a Apple quality chips at Shenzhen speed. That, that, I mean, the, the, the political incorrectness aside, I think that is from a nerdy perspective that, that is, that is the message, right? We're, we are venturing, we're endeavoring to enable a lot more hardware companies to build highly custom single chips that are almost as good as a monolithic SOC that can go into all kinds of products.

Chris Gammell: Yeah. And I noticed too, so like there's further customization that's available internally. Like I noticed you have FPGAs internally too. So you could have other layers of customization internal to the chip itself. I mean, maybe you give up some power stuff, but you could really have a, you know, someone could go and set up a system for themselves where they have an FPGA internally, they have RF and power and everything else in there. But now they have a custom solution that has other customizable elements internally. And then they could use that for years at a time, instead of just, you know, a turnaround consumer level kind of six month timeline kind of thing.

Ming Zhang: That's absolutely right. Yeah. FPGA as a chiplet, it gives you one more layer of customizability on top of the smart fabric programmability. So.

Chris Gammell: Yeah. And how much, okay. So I go and boot a chip. So I have the Omni chip. Do I have to actually interact? You had mentioned like it has some, some smart capabilities internally on the, on the smart fabric of like programming, like the, where signals routing, but it done. It does it at, at boot time. Do I have to actually interact with that chip at all? Is it like I squared C bus or anything like that? Or is it just powered up and it's ready to go?

Ming Zhang: It's, it's power up and ready to go. If you choose to be a kind of a, in a customer mode, right. Meaning that mass production mode, everything is done. But during the debug or bring up phase, if you like, you can actually enter the deep firmware mode to try to actually manipulate all the internal code. And for example, try to access a particular IO or a particular power Island. You can actually get a lot of observability into the chip. But the whole idea is that once you fully bring up the system, right. Once everything is done, none of that needs to be repeated. Right.

Chris Gammell: So I feel like this is Ming saying in a very kind way, if you mess something up, you can access the pins, which is actually really nice. That's right.

Ming Zhang: If you, if you do everything perfectly, you don't have to exercise any of the nice debug functions. Cause the design is bug free. Yeah.

Chris Gammell: That's, that's what we always want. Uh, and you mentioned there's checking anyway. So like, there's probably, there's probably checks in place that it's not going to let me hook up a power input to a, you know, a ground or anything like that. I'm sure.

Ming Zhang: That, that actually is one of the rules that are being checked in the checker, right. Don't connect power to the ground. Don't have twisted IO wires. That that's actually, that's absolutely right.

Chris Gammell: Nothing will stop me from reversing RX and TX. I don't know how much, I don't know. I think the most advanced AI, uh, uh, DRC program in the world couldn't stop me from swapping those.

Ming Zhang: So I'm sure, I'm sure there's some way to do it. If you intentionally, if you intentionally twist that wire. Yeah. That, that, that'll, that'll more like a validation problem that has to be kind of caught at the higher level. Yeah.

Chris Gammell: That's a human error.

Ming Zhang: Yeah. And it's not, it's actually not uncommon, right? We, we have, uh, we have seen cases where a resistor was forgotten, right? It's, it's just simply an oversight. Now the good news is that we have programmable resistor banks in the interposer. So you can actually add it back in post production. Right. So, yeah. And that, or certain interconnects, not that we encourage people to rush out a design, but if you had to rush out a design that you're missing a wire and missing a bunch of resistors. That most likely those can be fixed post-silicon.

Chris Gammell: Mm-hmm. Great. Yeah. That's, that's really awesome. I mean, this whole, I don't know, like where, where does this all keep going? I mean, what is the future of chiplets and in silicon design and board design? How do you see it moving forward into the future?

Ming Zhang: Yeah. It's funny how you use all three words, right? Chiplet chip and board designs. Right. In my view, I think all three things are going to converge. I think in the future, the chip, the chiplet and the chip, a system design is almost the same thing. Right. Meaning that it's, it's a system that looks like a single chip. If you peel the onions, peel the package layers, there are chiplets in it. There, there has to be, that has to be the future, right? Heterogeneous integration of chiplets in a cost efficient and, and power efficient way very rapidly. That has to be the future. Because again, a simple geometric shrinking of transistors. I, I think it's coming very close to an end, right? And it doesn't mean technology event advancement is going to end. It just means that we have to think about scaling in a different direction, right? Now the name, the company name Zglue, right, when it was originally conceived that letter Z means Z axis vertical direction, right? To scaling in that direction. That's kind of what we think that the future is.

Chris Gammell: Ah, interesting. So at some point the chip builder might let you go 3D and stack, stack things up. Is that what I'm hearing here? That's right.

Ming Zhang: That's right. Now it's two layer, right? There's a, there's a fabric, there's a chiplet. It's strictly two layer, uh, very soon it'll be three layers and multi layers.

Chris Gammell: Wow. Making like a little apartment block of chiplets where they all live in their little, and there's elevators between them for data and RF and power and everything else. Huh?

Ming Zhang: And almost like elevator or silicon high rise type of concept. Yeah. Yeah. Now we have a two level, simple townhouse.

Chris Gammell: Yeah. Yeah. Okay. Well, Ming, where can people find out more about Zglue and about you and, uh, and how to get started?

Ming Zhang: Well, um, I guess Zglue.com. That'll be, uh, the best place to, uh, to know a little bit about the technology, the product and the team. And, uh, that'll be a good place to start.

Chris Gammell: Great. Well, thank you so much for joining me here. I, I'm really excited about this. I, I hope I get the opportunity to try this sometime soon. And I think I'm going to check, I'm going to check out all the existing designs as a, uh, you know, as a starting place, because it seems like they're already pre-integrated and interesting chip designs that will be, could benefit my, my board designs at any point in the future.

Ming Zhang: That's right. I also wanted to add that, uh, at DAC slash Semicon West this year, which is going to happen in about 20 days, we're going to have our first ever digital virtual booth, right? It's no longer possible to be physical. So we're, uh, we're still trying to figure out how exactly that works. Okay. So we're going to have a virtual booth at DAC and Semicon West, uh, about 20 days. That could be also a good opportunity to virtually meet with some of us to, to figure out how we can work together.

Chris Gammell: Yeah. Yeah. That'd be great. That sounds like a future Zglue design would be a augmented reality to, to make, to make these conferences socially distanced as necessary. They're, uh, yeah, unfortunately can't, can't come up and shake your hand yet and see the, the chips up in person. That's right. Yeah. Okay, great. Well, we'll definitely include links to all those things and, uh, and links to Zglue and all the resources we talked about here. So thanks for joining us today. Thank you. Thanks, Chris. Thanks.

Speaker ?: Bye. Thank you.